PCI/ATS: Show PASID Capability register width in bitmasks
authorBjorn Helgaas <bhelgaas@google.com>
Tue, 10 Oct 2023 20:44:30 +0000 (15:44 -0500)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 24 Oct 2023 21:55:45 +0000 (16:55 -0500)
commitd30fea25845ff65ea1fb255d7b615cd02b65095b
treeff4f00e7f1393d7bdb0421a0290b18f0635323b2
parent04e82fa5951ca66495d7b05665eff673aa3852b4
PCI/ATS: Show PASID Capability register width in bitmasks

The PASID Capability and Control registers are both 16 bits wide.  Use
16-bit wide constants in field names to match the register width.  No
functional change intended.

Link: https://lore.kernel.org/r/20231010204436.1000644-5-helgaas@kernel.org
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
include/uapi/linux/pci_regs.h