clk: imx8m: fix clock tree update of TF-A managed clocks
authorAhmad Fatoum <a.fatoum@pengutronix.de>
Tue, 10 Aug 2021 15:14:33 +0000 (17:14 +0200)
committerAbel Vesa <abel.vesa@nxp.com>
Tue, 24 Aug 2021 13:09:07 +0000 (16:09 +0300)
commitd36207b848a6490e14664e2197a1c8ab51d8148e
treed396817b32eed8c0c0a050edcdc2403a698648a4
parentfb549644eeb116c6de8c988bf05f136ee969606f
clk: imx8m: fix clock tree update of TF-A managed clocks

On the i.MX8M*, the TF-A exposes a SiP (Silicon Provider) service
for DDR frequency scaling. The imx8m-ddrc-devfreq driver calls the
SiP and then does clk_set_parent on the DDR muxes to synchronize
the clock tree.

Since 936c383673b9 ("clk: imx: fix composite peripheral flags"),
these TF-A managed muxes have SET_PARENT_GATE set, which results
in imx8m-ddrc-devfreq's clk_set_parent after SiP failing with -EBUSY:

echo 25000000 > userspace/set_freq
imx8m-ddrc-devfreq 3d400000.memory-controller: failed to set
dram_apb parent: -16

Fix this by adding a new i.MX composite flag for firmware managed
clocks, which clears SET_PARENT_GATE.

This is safe to do, because updating the Linux clock tree to reflect
reality will always be glitch-free.

Fixes: 936c383673b9 ("clk: imx: fix composite peripheral flags")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20210810151432.9228-1-a.fatoum@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
drivers/clk/imx/clk-composite-8m.c
drivers/clk/imx/clk-imx8mm.c
drivers/clk/imx/clk-imx8mn.c
drivers/clk/imx/clk-imx8mq.c
drivers/clk/imx/clk.h