clk: microchip: add PolarFire SoC fabric clock support
authorConor Dooley <conor.dooley@microchip.com>
Thu, 8 Sep 2022 14:36:51 +0000 (15:36 +0100)
committerClaudiu Beznea <claudiu.beznea@microchip.com>
Wed, 14 Sep 2022 07:57:07 +0000 (10:57 +0300)
commitd39fb172760e426e0628f16b785c85e16d17bd5e
treeb7369c6a309dcc8f441fe47ce0856cfd014cb39b
parentb4b025246c0fbb8611a26bab121596f47f0bf116
clk: microchip: add PolarFire SoC fabric clock support

Add a driver to support the PLLs in PolarFire SoC's Clock Conditioning
Circuitry, an instance of which is located in each ordinal corner of
the FPGA. Only get_rate() is supported as these clocks are intended to
be statically configured by the FPGA design. Currently, the DLLs are
not supported by this driver. For more information on the hardware, see
"PolarFire SoC FPGA Clocking Resources" in the link below.

Link: https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20220908143651.1252601-5-conor.dooley@microchip.com
drivers/clk/microchip/Makefile
drivers/clk/microchip/clk-mpfs-ccc.c [new file with mode: 0644]