dt-bindings: riscv: Document cbop-block-size
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Sun, 29 Oct 2023 12:35:00 +0000 (09:35 -0300)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 11 Jan 2024 15:36:30 +0000 (07:36 -0800)
commitd3e591a38c98d448ae84eba1f89388c55382cb0e
treeae147e09f1fbc8c1ec25ff024ccdb8f0b8158231
parent2e605741e9dd26426ba2475afaf5966d781bfbc6
dt-bindings: riscv: Document cbop-block-size

Following the examples of cbom-block-size and cboz-block-size,
cbop-block-size is the cache size of Zicbop (cbo.prefetch) operations.
The most common case is to have all cache block sizes to be the same
size (e.g. profiles such as rva22u64 mandates a 64 bytes size for all
cache operations), but there's no specification requirement for that,
and an implementation can have different cache sizes for each operation.

Cc: Rob Herring <robh@kernel.org>
Cc: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20231029123500.739409-1-dbarboza@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Documentation/devicetree/bindings/riscv/cpus.yaml