clk: mmp: pxa168: fix GPIO clock enable bits
authorDoug Brown <doug@schmorgal.com>
Sun, 12 Jun 2022 19:29:33 +0000 (12:29 -0700)
committerStephen Boyd <sboyd@kernel.org>
Fri, 30 Sep 2022 20:34:06 +0000 (13:34 -0700)
commitd4161f7e7358eb3f20e6b82fa2ace19712ea5e6e
tree8f8b23b935588fb97f1435c518b51de808597bd2
parent7fad6b755fcb5fd4fe9127662cf41eb84d02fdb8
clk: mmp: pxa168: fix GPIO clock enable bits

According to the datasheet, only bit 0 of APBC_GPIO should be controlled
for the clock enable. Bit 1 is marked as reserved (always write 0).

Signed-off-by: Doug Brown <doug@schmorgal.com>
Link: https://lore.kernel.org/r/20220612192937.162952-9-doug@schmorgal.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mmp/clk-of-pxa168.c