dt-bindings: misc: xlnx,sd-fec: convert bindings to yaml
authorDragan Cvetic <dragan.cvetic@amd.com>
Wed, 31 Jan 2024 17:06:45 +0000 (17:06 +0000)
committerRob Herring <robh@kernel.org>
Mon, 5 Feb 2024 01:49:51 +0000 (19:49 -0600)
commitd4d8fbcef03f590288b44955d8d51e334627b013
tree9010f2be5e5286af71b9e6bab2d20330826c3fdd
parent85f838adad5487f96ff3acf6d3eb8263a39a0757
dt-bindings: misc: xlnx,sd-fec: convert bindings to yaml

Convert AMD (Xilinx) sd-fec bindings to yaml format, so it can validate
dt-entries as well as any future additions to yaml.
Change in clocks is due to IP is itself configurable and
only the first two clocks are in all combinations. The last
6 clocks can be present in some of them. It means order is
not really fixed and any combination is possible.
Interrupt may or may not be present.
The documentation for sd-fec bindings is now YAML, so update the
MAINTAINERS file.
Update the link to the new yaml file in xilinx_sdfec.rst.

Signed-off-by: Dragan Cvetic <dragan.cvetic@amd.com>
Link: https://lore.kernel.org/r/20240131170650.530079-1-dragan.cvetic@amd.com
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/misc/xlnx,sd-fec.txt [deleted file]
Documentation/devicetree/bindings/misc/xlnx,sd-fec.yaml [new file with mode: 0644]
Documentation/misc-devices/xilinx_sdfec.rst
MAINTAINERS