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drm/i915/adlp: Add DP MST DPT/DPTP alignment WA (Wa_14014143976)
authorImre Deak <imre.deak@intel.com>
Mon, 29 Jan 2024 17:55:30 +0000 (19:55 +0200)
committerImre Deak <imre.deak@intel.com>
Wed, 10 Apr 2024 16:12:57 +0000 (19:12 +0300)
commitd4e745ba81c335118c3ec5860c8b73381de2a7a9
treec3b68ea8e6756d6766f0b8714b514fdd1a4d2c71tree | snapshot
parent1af52d0555b9ffcbce8bdc9d28a9e81c81a53274commit | diff
drm/i915/adlp: Add DP MST DPT/DPTP alignment WA (Wa_14014143976)

Add a workaround to fix BS-BS jitter issues on MST links, aligning
DPT/DPTP MTPs.

Bspec: 50050, 55424

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240129175533.904590-4-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_dp_mst.c diff | blob | history
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git