ARC: mm: fix new code about cache aliasing
authorVineet Gupta <vgupta@kernel.org>
Thu, 28 Mar 2024 05:19:25 +0000 (22:19 -0700)
committerVineet Gupta <vgupta@kernel.org>
Tue, 2 Apr 2024 01:40:39 +0000 (18:40 -0700)
commitd5272aaa8257920c7b398f953ada65e25c248f9a
tree9d0318884cfe44c0761fc81d7acdadf7f5abf85b
parentdb70d9f9dcf8d5cda86303eeb381b1213a2ab191
ARC: mm: fix new code about cache aliasing

Manual/partial revert of 8690bbcf3b70 ("Introduce cpu_dcache_is_aliasing() across all architectures")

Current generation of ARCv2/ARCv3 based HSxx cores are only PIPT (to software
at least).

Legacy ARC700 cpus could be VIPT aliasing (based on cache geometry and
PAGE_SIZE) [1] however recently that support was ripped out so VIPT aliasing
cache is not relevant to ARC anymore.

[1] http://lists.infradead.org/pipermail/linux-snps-arc/2023-February/006899.html

Acked-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com>
Signed-off-by: Vineet Gupta <vgupta@kernel.org>
arch/arc/Kconfig
arch/arc/include/asm/cachetype.h [deleted file]