drm/i915/gen11: Wa_1408615072/Wa_1407596294 should be on GT list
authorMatt Roper <matthew.d.roper@intel.com>
Wed, 1 Feb 2023 22:28:29 +0000 (14:28 -0800)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 22 Feb 2023 11:57:10 +0000 (12:57 +0100)
commitd53360d443bebc4e654b1b1cfe859db1ecd3a5ed
tree1cf0f7476e503c03a38a627b8ae5a6ff1dde1294
parent8174915c7bf3efd7871156a4cd6c17f3df9df620
drm/i915/gen11: Wa_1408615072/Wa_1407596294 should be on GT list

[ Upstream commit d5a1224aa68c8b124a4c5c390186e571815ed390 ]

The UNSLICE_UNIT_LEVEL_CLKGATE register programmed by this workaround
has 'BUS' style reset, indicating that it does not lose its value on
engine resets.  Furthermore, this register is part of the GT forcewake
domain rather than the RENDER domain, so it should not be impacted by
RCS engine resets.  As such, we should implement this on the GT
workaround list rather than an engine list.

Bspec: 19219
Fixes: 3551ff928744 ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230201222831.608281-2-matthew.d.roper@intel.com
(cherry picked from commit 5f21dc07b52eb54a908e66f5d6e05a87bcb5b049)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/i915/gt/intel_workarounds.c