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(parent: 876fcc4) | patch
drm/amd/display: Acquire FCLK DPM levels on DCN32
authorDillon Varone <Dillon.Varone@amd.com>
Wed, 28 Sep 2022 19:44:38 +0000 (15:44 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 10 Oct 2022 21:32:55 +0000 (17:32 -0400)
commitd6170e418d1d3ae7e98cb6d96d1444e880131bbf
treef87db9ab14d36164c27c2c05a372fec57fc4a812tree | snapshot
parent876fcc4222e1d0e5b73343f4010a8b66be058f48commit | diff
drm/amd/display: Acquire FCLK DPM levels on DCN32

[Why & How]
Acquire FCLK DPM levels to properly construct DML clock limits. Further
add new logic to keep number of indices for each clock in clk_mgr.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c diff | blob | history
drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git