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phy: ti: gmii-sel: add support for am654x/j721e soc
authorGrygorii Strashko <grygorii.strashko@ti.com>
Tue, 3 Mar 2020 16:00:27 +0000 (18:00 +0200)
committerKishon Vijay Abraham I <kishon@ti.com>
Fri, 20 Mar 2020 14:04:29 +0000 (19:34 +0530)
commitd9aa91dfb2da59c1f22887013a1cec32a6f9fcec
tree75686dc3e87a7d145729f73c57e4e25907dba3a8tree | snapshot
parent74e29703a78c120cd129e2b49ac8213713d2648ccommit | diff
phy: ti: gmii-sel: add support for am654x/j721e soc

TI AM654x/J721E SoCs have the same PHY interface selection mechanism for
CPSWx subsystem as TI SoCs (AM3/4/5/DRA7), but registers and bit-fields
placement is different.

This patch adds corresponding support for TI AM654x/J721E SoCs PHY
interface selection.

Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/phy/ti/phy-gmii-sel.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git