drm/i915/display: update pll values in sync with Bspec for MTL
authorRavi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>
Wed, 14 Feb 2024 07:09:30 +0000 (12:39 +0530)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 14 Feb 2024 17:27:25 +0000 (09:27 -0800)
commitd9b904d2efdf2abb9e0f7162544da562101872cb
tree83f5e9d3466b3662ef9a20c11c1d6a0f29078a73
parent3a86cb16ab329b235ecd26adce584e5cb0c808d4
drm/i915/display: update pll values in sync with Bspec for MTL

DP/eDP and HDMI C20 PHY PLL values were updated for MTL platform

Signed-off-by: Ravi Kumar Vodapalli <ravi.kumar.vodapalli@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240214070930.1028456-1-ravi.kumar.vodapalli@intel.com
drivers/gpu/drm/i915/display/intel_cx0_phy.c