RISC-V: Add defines for SBI debug console extension
authorAnup Patel <apatel@ventanamicro.com>
Fri, 22 Jul 2022 13:24:54 +0000 (18:54 +0530)
committerAnup Patel <anup@brainfault.org>
Fri, 20 Oct 2023 11:20:28 +0000 (16:50 +0530)
commitdadf7886993c69c6838107573e250a3b3fda25e3
treebed3be7976cd1bf40d6639eaef62addebe1947be
parent62d0c458f828949dd01bfe41daf3bed73ab9e288
RISC-V: Add defines for SBI debug console extension

We add SBI debug console extension related defines/enum to the
asm/sbi.h header.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
arch/riscv/include/asm/sbi.h