dt-bindings: net: Add support for AM65x SR1.0 in ICSSG
authorDiogo Ivo <diogo.ivo@siemens.com>
Wed, 3 Apr 2024 10:48:11 +0000 (11:48 +0100)
committerPaolo Abeni <pabeni@redhat.com>
Tue, 9 Apr 2024 07:47:28 +0000 (09:47 +0200)
commitdc073430db8d3f28460ea3ec1901e34bf7e8c0f2
tree11d35d2b8b35d70bce3ea75a7aa57ae359e53d71
parent87c33315af380ca12a2e59ac94edad4fe0481b4c
dt-bindings: net: Add support for AM65x SR1.0 in ICSSG

Silicon Revision 1.0 of the AM65x came with a slightly different ICSSG
support: Only 2 PRUs per slice are available and instead 2 additional
DMA channels are used for management purposes. We have no restrictions
on specified PRUs, but the DMA channels need to be adjusted.

Co-developed-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Diogo Ivo <diogo.ivo@siemens.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: MD Danish Anwar <danishanwar@ti.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Documentation/devicetree/bindings/net/ti,icssg-prueth.yaml