coresight-tpdm: Add timestamp control register support for the CMB
authorTao Zhang <quic_taozha@quicinc.com>
Sun, 4 Feb 2024 05:30:39 +0000 (13:30 +0800)
committerSuzuki K Poulose <suzuki.poulose@arm.com>
Mon, 12 Feb 2024 10:29:47 +0000 (10:29 +0000)
commitdc6ce57e2aa0b10b0b78517245ea0ba47eed75b1
treea571f23c1b05dc0cc330e4ab1fa3a15170c0b318
parent53d4a017a52458d835a1f9524df09c65c2208400
coresight-tpdm: Add timestamp control register support for the CMB

CMB_TIER register is CMB subunit timestamp insertion enable register.
Bit 0 is PATT_TSENAB bit. Set this bit to 1 to request a timestamp
following a CMB interface pattern match. Bit 1 is XTRIG_TSENAB bit.
Set this bit to 1 to request a timestamp following a CMB CTI timestamp
request. Bit 2 is TS_ALL bit. Set this bit to 1 to request timestamp
for all packets.

Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: Tao Zhang <quic_taozha@quicinc.com>
Signed-off-by: Jinlong Mao <quic_jinlmao@quicinc.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/1707024641-22460-9-git-send-email-quic_taozha@quicinc.com
Documentation/ABI/testing/sysfs-bus-coresight-devices-tpdm
drivers/hwtracing/coresight/coresight-tpdm.c
drivers/hwtracing/coresight/coresight-tpdm.h