clk: imx: imx8mp: fix pll mux bit
authorPeng Fan <peng.fan@nxp.com>
Thu, 7 May 2020 05:56:12 +0000 (13:56 +0800)
committerShawn Guo <shawnguo@kernel.org>
Wed, 20 May 2020 01:26:42 +0000 (09:26 +0800)
commitdc6e21da340297604f217bcff016389cf78b2a49
tree3116e3232ff26b475573adc67db608e463ee9658
parentcccc46474227eaaa7cd8f5601bba58489e237991
clk: imx: imx8mp: fix pll mux bit

Same to i.MX8MN/i.MX8MM, pll BYPASS bit should be kept inside pll
driver for glitchless freq setting following spec. If exposing the
bit, that means pll driver and clk driver has two paths to touch
this bit, which is wrong.

So use EXT_BYPASS bit here.

Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
drivers/clk/imx/clk-imx8mp.c