target/riscv: remove RISCV_FEATURE_MMU
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Wed, 22 Feb 2023 18:52:04 +0000 (15:52 -0300)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 1 Mar 2023 21:47:15 +0000 (13:47 -0800)
commitdcf654a3e899ac2569393ca3a4747c3776d9c9a3
treed40ef8c911d6a8aeb6981b5a02a84b073347378a
parentc95c9d200e22b17858ec9287b6a9716d053e48aa
target/riscv: remove RISCV_FEATURE_MMU

RISCV_FEATURE_MMU is set whether cpu->cfg.mmu is set, so let's just use
the flag directly instead.

With this change the enum is also removed. It is worth noticing that
this enum, and all the RISCV_FEATURES_* that were contained in it,
predates the existence of the cpu->cfg object. Today, using cpu->cfg is
an easier way to retrieve all the features and extensions enabled in the
hart.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Message-ID: <20230222185205.355361-10-dbarboza@ventanamicro.com>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
target/riscv/cpu.c
target/riscv/cpu.h
target/riscv/cpu_helper.c
target/riscv/csr.c
target/riscv/monitor.c
target/riscv/pmp.c