drm/xe/irq: Rename and clarify top-level interrupt handling routines
authorMatt Roper <matthew.d.roper@intel.com>
Sat, 1 Apr 2023 00:21:03 +0000 (17:21 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Dec 2023 23:31:31 +0000 (18:31 -0500)
commitdd12b0ff2cf29904194bc8a5f0a8bc7a2b7041fa
treef5242b28b8b4df6d1421eb6424157f8ecd69d825
parent6b7ece97dd21d2b80a41f6192f89f8848c3b1d76
drm/xe/irq: Rename and clarify top-level interrupt handling routines

Platforms supported by the Xe driver handle top-level interrupts in one
of two ways:
 - Xe_LP platforms only have a "graphics master" register and lack a
   "master tile" register, so top-level interrupt detection and
   enable/disable happens in the graphics master.
 - Xe_LP+ (aka DG1) and beyond have a "master tile" interrupt register
   that controls the enable/disable of top-level interrupts and must
   also be consulted to determine which tiles have received interrupts
   before the driver moves on the process the graphics master register.

For functions that are only relevant to the first set of platforms,
rename the function prefix to Xe_LP since "gen11" doesn't make sense in
the Xe driver.  Also add some comments briefly describing the two
top-level handlers.

Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/20230401002106.588656-6-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_irq.c