riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause
authorMinda Chen <minda.chen@starfivetech.com>
Wed, 2 Aug 2023 06:42:15 +0000 (14:42 +0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 1 Nov 2023 02:15:54 +0000 (19:15 -0700)
commitdd16ac404a685cce07e67261a94c6225d90ea7ba
tree807c05359bbe2743b8724c47fa5ac9fc7e733256
parent92235d3d8365d24f6cc6701b545e764ef144806a
riscv: Using TOOLCHAIN_HAS_ZIHINTPAUSE marco replace zihintpause

Actually it is a part of Conor's
commit aae538cd03bc ("riscv: fix detection of toolchain
Zihintpause support").
It is looks like a merge issue. Samuel's
commit 0b1d60d6dd9e ("riscv: Fix build with
CONFIG_CC_OPTIMIZE_FOR_SIZE=y") do not base on Conor's commit and
revert to __riscv_zihintpause. So this patch can fix it.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Fixes: 3c349eacc559 ("Merge patch "riscv: Fix build with CONFIG_CC_OPTIMIZE_FOR_SIZE=y"")
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230802064215.31111-1-minda.chen@starfivetech.com
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/vdso/processor.h