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(parent: 5a220c5) | patch
drm/i915: Rename PIPECONF refresh select bits
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 10 Mar 2022 00:47:57 +0000 (02:47 +0200)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 10 Mar 2022 15:05:06 +0000 (17:05 +0200)
commitdd7ae6b3e857f230a804ce8706700891e526cc64
tree4480e92192adc0b6512197ee8dbc12b0a7c01849tree | snapshot
parent5a220c536b50b90c4577247ce451a6957fbd1affcommit | diff
drm/i915: Rename PIPECONF refresh select bits

Rename the PIPECONF refresh rate select bits to be
less cryptic. Also nothing eDP specific about these as they
also select between FP0 vs. FP1 for the DPLL and thus can be
used to change the refresh rate on other output types as well.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220310004802.16310-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/display/intel_drrs.c diff | blob | history
drivers/gpu/drm/i915/i915_reg.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git