Merge tag 'clk-meson-v6.3-1' of https://github.com/BayLibre/clk-meson into clk-amlogic
authorStephen Boyd <sboyd@kernel.org>
Wed, 25 Jan 2023 19:31:13 +0000 (11:31 -0800)
committerStephen Boyd <sboyd@kernel.org>
Wed, 25 Jan 2023 19:31:13 +0000 (11:31 -0800)
commitdf43ce489d3399966878a999eccbcae3ea21738e
treee63f7b30ec3c3138418aacddff2b4e612f3e8b67
parent1b929c02afd37871d5afb9d498426f83432e71c2
parent716592fdb5e255a1b9dcb444822c9c1f9a1e248c
Merge tag 'clk-meson-v6.3-1' of https://github.com/BayLibre/clk-meson into clk-amlogic

Pull Amlogic clk updates from Jerome Brunet:

 - Use .determine_rate() instead of .round_rate() for the dualdiv, mpll,
   sclk-div and cpu-dyn-div amlogic clock drivers

* tag 'clk-meson-v6.3-1' of https://github.com/BayLibre/clk-meson:
  clk: meson: clk-cpu-dyndiv: switch from .round_rate to .determine_rate
  clk: meson: sclk-div: switch from .round_rate to .determine_rate
  clk: meson: dualdiv: switch from .round_rate to .determine_rate
  clk: meson: mpll: Switch from .round_rate to .determine_rate