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(parent: d28b15a) | patch
target/riscv: Add the HGATP register masks
authorAlistair Francis <Alistair.Francis@wdc.com>
Sat, 20 Apr 2019 02:27:43 +0000 (02:27 +0000)
committerPalmer Dabbelt <palmer@sifive.com>
Fri, 24 May 2019 19:09:25 +0000 (12:09 -0700)
commite06431108b0b1ef6ca76398d2b0b792ea24ae6bc
tree57d37d6336ec270a9692f9a3478ea91fe6d55fc5tree | snapshot
parentd28b15a4d3b1e000ec7bf9090fe870cbc5f1eb2ccommit | diff
target/riscv: Add the HGATP register masks

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
target/riscv/cpu_bits.h diff | blob | history
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