crypto: octeontx2 - increase CPT HW instruction queue length
authorSrujana Challa <schalla@marvell.com>
Tue, 25 Jan 2022 18:26:24 +0000 (23:56 +0530)
committerHerbert Xu <herbert@gondor.apana.org.au>
Sat, 5 Feb 2022 04:10:50 +0000 (15:10 +1100)
commite236ab0d43622a8a5a8ff06630fd467b444a9db9
tree0ed668ad75376ed14567465670f1a7b91bf7b170
parent9eef6e972a32bc2454a22e8f0e8d4e7f55ff6613
crypto: octeontx2 - increase CPT HW instruction queue length

LDWB is getting incorrectly used in HW when
CPT_AF_LF()_PTR_CTL[IQB_LDWB]=1 and CPT instruction queue has less than
320 free entries. So, increase HW instruction queue size by 320 and give
320 entries less for SW/NIX RX as a SW workaround.

Signed-off-by: Srujana Challa <schalla@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
drivers/crypto/marvell/octeontx2/otx2_cptlf.h