iommu/mediatek: Initialise bank HW for each a bank
authorYong Wu <yong.wu@mediatek.com>
Tue, 3 May 2022 07:14:21 +0000 (15:14 +0800)
committerJoerg Roedel <jroedel@suse.de>
Wed, 4 May 2022 08:39:40 +0000 (10:39 +0200)
commite24453e165bc774b53f826e86e8f4e9931ffcfba
tree8f586cc765127a0f60dd788f8012dfd123112655
parent99ca02281332957e0ee7e3702c4713dfae4a6046
iommu/mediatek: Initialise bank HW for each a bank

The mt8195 IOMMU HW max support 5 banks, and regarding the banks'
registers, it looks like:

 ----------------------------------------
 |bank0  | bank1 | bank2 | bank3 | bank4|
 ----------------------------------------
 |global |
 |control|         null
 |regs   |
 -----------------------------------------
 |bank   |bank   |bank   |bank   |bank   |
 |regs   |regs   |regs   |regs   |regs   |
 |       |       |       |       |       |
 -----------------------------------------

Each bank has some special bank registers and it share bank0's global
control registers. this patch initialise the bank hw with the bankid.

In the hw_init, we always initialise bank0's control register since
we don't know if the bank0 is initialised.

Additionally, About each bank's register base, always delta 0x1000.
like bank[x + 1] = bank[x] + 0x1000.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Link: https://lore.kernel.org/r/20220503071427.2285-31-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
drivers/iommu/mtk_iommu.c