scsi: ufs: ufs-exynos: Change pclk available max value
authorChanho Park <chanho61.park@samsung.com>
Mon, 18 Oct 2021 12:42:04 +0000 (21:42 +0900)
committerMartin K. Petersen <martin.petersen@oracle.com>
Thu, 28 Oct 2021 03:10:10 +0000 (23:10 -0400)
commite387d448e4899f4bbf7c8151472a2fed72063d82
tree3661df1fb6c8d0a29de4b5aa82de8959977de782
parent10fb4f87438d99b2ef06aea38ca2f0454725e8b5
scsi: ufs: ufs-exynos: Change pclk available max value

To support 167MHz PCLK, we need to adjust the maximum value.

Link: https://lore.kernel.org/r/20211018124216.153072-4-chanho61.park@samsung.com
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
drivers/scsi/ufs/ufs-exynos.h