irqchip/irq-sifive-plic: Add syscore callbacks for hibernation
authorMason Huo <mason.huo@starfivetech.com>
Tue, 4 Apr 2023 03:29:08 +0000 (11:29 +0800)
committerMarc Zyngier <maz@kernel.org>
Sat, 8 Apr 2023 10:19:47 +0000 (11:19 +0100)
commite80f0b6a2cf302b56b7d6d7ad3797aebc97fccb9
treeec9d8deba1acd1cfce07b45ceed8daed7711ddd0
parent9dfc77917e3b82dc7f93d62cebf1ebb885e9cc6a
irqchip/irq-sifive-plic: Add syscore callbacks for hibernation

The priority and enable registers of plic will be reset
during hibernation power cycle in poweroff mode,
add the syscore callbacks to save/restore those registers.

Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Reviewed-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
Reported-by: Dan Carpenter <error27@gmail.com>
Link: https://lore.kernel.org/r/202302140709.CdkxgtPi-lkp@intel.com/
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230404032908.89638-1-mason.huo@starfivetech.com
drivers/irqchip/irq-sifive-plic.c