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(parent: 4c4f0e4) | patch
openpic: lower interrupt when reading the MSI register
authorScott Wood <scottwood@freescale.com>
Fri, 21 Dec 2012 16:15:39 +0000 (16:15 +0000)
committerAlexander Graf <agraf@suse.de>
Mon, 7 Jan 2013 16:37:09 +0000 (17:37 +0100)
commite99fd8af63a1692a1159cba8fa4943f2589adf97
treefc761e23735e982c7c6062355e188f395f8dd8b2tree | snapshot
parent4c4f0e4801ac79632d03867c88aafc90b4ce503ccommit | diff
openpic: lower interrupt when reading the MSI register

This will stop things from breaking once it's properly treated as a
level-triggered interrupt.  Note that it's the MPIC's MSI cascade
interrupts that are level-triggered; the individual MSIs are
edge-triggered.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
hw/openpic.c diff | blob | history
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