crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}
authorJerry Shih <jerry.shih@sifive.com>
Mon, 22 Jan 2024 00:19:15 +0000 (16:19 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Tue, 23 Jan 2024 01:55:18 +0000 (17:55 -0800)
commiteb24af5d7a05bbcdebb0398f91af990719644093
tree9f15a7fe7770b725a4d6a77a269921de551fb10a
parent178f3856436c748485cb7f8c134be2471f6d539f
crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}

Add implementations of AES-ECB, AES-CBC, AES-CTR, and AES-XTS, as well
as bare (single-block) AES, using the RISC-V vector crypto extensions.
The assembly code is derived from OpenSSL code (openssl/openssl#21923)
that was dual-licensed so that it could be reused in the kernel.
Nevertheless, the assembly has been significantly reworked for
integration with the kernel, for example by using regular .S files
instead of the so-called perlasm, using the assembler instead of bare
'.inst', greatly reducing code duplication, supporting AES-192, and
making the code use the same AES key structure as the C code.

Co-developed-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Phoebe Chen <phoebe.chen@sifive.com>
Signed-off-by: Jerry Shih <jerry.shih@sifive.com>
Co-developed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Eric Biggers <ebiggers@google.com>
Link: https://lore.kernel.org/r/20240122002024.27477-5-ebiggers@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/crypto/Kconfig
arch/riscv/crypto/Makefile
arch/riscv/crypto/aes-macros.S [new file with mode: 0644]
arch/riscv/crypto/aes-riscv64-glue.c [new file with mode: 0644]
arch/riscv/crypto/aes-riscv64-zvkned-zvbb-zvkg.S [new file with mode: 0644]
arch/riscv/crypto/aes-riscv64-zvkned-zvkb.S [new file with mode: 0644]
arch/riscv/crypto/aes-riscv64-zvkned.S [new file with mode: 0644]