iio: frequency: adf4377: add support for ADF4377
authorAntoniu Miclaus <antoniu.miclaus@analog.com>
Tue, 15 Nov 2022 11:00:41 +0000 (13:00 +0200)
committerJonathan Cameron <Jonathan.Cameron@huawei.com>
Wed, 23 Nov 2022 21:05:51 +0000 (21:05 +0000)
commiteda549e2e52496d0d374ce457f514a4f14172aa5
tree2b9dfa7350147c7b5383f38ea355182bbf8d478b
parent1407438a7ad513a9dd5c70bc996200f97960584c
iio: frequency: adf4377: add support for ADF4377

The ADF4377 is a high performance, ultralow jitter, dual output integer-N
phased locked loop (PLL) with integrated voltage controlled oscillator
(VCO) ideally suited for data converter and mixed signal front end (MxFE)
clock applications.

Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/adf4377.pdf
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Reviewed-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20221115110041.71495-2-antoniu.miclaus@analog.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
drivers/iio/frequency/Kconfig
drivers/iio/frequency/Makefile
drivers/iio/frequency/adf4377.c [new file with mode: 0644]