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(parent: 496d068) | patch
phy: qcom-qmp: pcs: Add v6 register offsets
authorAbel Vesa <abel.vesa@linaro.org>
Wed, 8 Feb 2023 18:00:11 +0000 (20:00 +0200)
committerVinod Koul <vkoul@kernel.org>
Fri, 10 Feb 2023 16:58:00 +0000 (22:28 +0530)
commitefecba3c9f076010701143634c6bf9a75b723107
tree775eea90682f20f1a3330e8512293003bd0c751etree | snapshot
parent496d068e2b881bde0c8b7882a95cbe7d4daa0892commit | diff
phy: qcom-qmp: pcs: Add v6 register offsets

The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB,
UFS and PCIE g3x2. Add the new PCS offsets in a dedicated header file.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230208180020.2761766-3-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h [new file with mode: 0644] blob
drivers/phy/qualcomm/phy-qcom-qmp.h diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git