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clk: rs9: Add support for 9FGV0841
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Mon, 13 Nov 2023 22:18:54 +0000 (23:18 +0100)
committerStephen Boyd <sboyd@kernel.org>
Sun, 17 Dec 2023 23:26:24 +0000 (15:26 -0800)
commitf0e5e1800204b82af6d3e8ef03012ab4afc22358
tree637cc6f1cc86ccc99022062d4a2c16a58a22acf1tree | snapshot
parentcd9a5c97dfdaeb9c8ac02e14d7ccbd445e8b5265commit | diff
clk: rs9: Add support for 9FGV0841

This model is similar to 9FGV0441, the DIFx bits start at bit 0 again,
except this chip has 8 outputs.

Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Link: https://lore.kernel.org/r/20231113221949.111964-4-marek.vasut+renesas@mailbox.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/clk-renesas-pcie.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git