target/i386: no single-step exception after MOV or POP SS
authorPaolo Bonzini <pbonzini@redhat.com>
Sat, 25 May 2024 08:03:22 +0000 (10:03 +0200)
committerPaolo Bonzini <pbonzini@redhat.com>
Sat, 25 May 2024 11:27:54 +0000 (13:27 +0200)
commitf0f0136abba688a6516647a79cc91e03fad6d5d7
tree1e33d58e6c6317ef9718914aef68e5586171f352
parent8225bff7c5db504f50e54ef66b079854635dba70
target/i386: no single-step exception after MOV or POP SS

Intel SDM 18.3.1.4 "If an occurrence of the MOV or POP instruction
loads the SS register executes with EFLAGS.TF = 1, no single-step debug
exception occurs following the MOV or POP instruction."

Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target/i386/tcg/translate.c