tcg/riscv: Simplify constraints on qemu_ld/st
authorRichard Henderson <richard.henderson@linaro.org>
Mon, 3 Apr 2023 19:47:55 +0000 (19:47 +0000)
committerRichard Henderson <richard.henderson@linaro.org>
Thu, 11 May 2023 08:53:41 +0000 (09:53 +0100)
commitf0f43534f7f5beb92788951da6944faad154c6a2
treecedd432cc828563a3b67ff68e26b3ff793925aa5
parent3dedb7201c292d340ac73fb0e52179e3690fb0c8
tcg/riscv: Simplify constraints on qemu_ld/st

The softmmu tlb uses TCG_REG_TMP[0-2], not any of the normally available
registers.  Now that we handle overlap betwen inputs and helper arguments,
we can allow any allocatable reg.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
tcg/riscv/tcg-target-con-set.h
tcg/riscv/tcg-target-con-str.h
tcg/riscv/tcg-target.c.inc