clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL
authorClaudiu Beznea <claudiu.beznea@microchip.com>
Mon, 11 Oct 2021 11:27:11 +0000 (14:27 +0300)
committerStephen Boyd <sboyd@kernel.org>
Wed, 27 Oct 2021 01:27:42 +0000 (18:27 -0700)
commitf12d028b743bb6136da60b17228a1b6162886444
treea9836f3992618900c9818a6adb1769e8a974c180
parent5df4cd9099d049b1696dd4b20f1d0413ee2af93f
clk: at91: sam9x60-pll: use DIV_ROUND_CLOSEST_ULL

Use DIV_ROUND_CLOSEST_ULL() to avoid any inconsistency b/w the rate
computed in sam9x60_frac_pll_recalc_rate() and the one computed in
sam9x60_frac_pll_compute_mul_frac().

Fixes: 43b1bb4a9b3e1 ("clk: at91: clk-sam9x60-pll: re-factor to support plls with multiple outputs")
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20211011112719.3951784-8-claudiu.beznea@microchip.com
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/at91/clk-sam9x60-pll.c