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arm64: dts: microchip: add missing cache properties
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Fri, 21 Apr 2023 22:31:55 +0000 (00:31 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 17 May 2023 12:12:03 +0000 (14:12 +0200)
commitf217d94fc632fece2a41030c2eebc4ed34a48b2a
treedfaf8523c065ae3bb890fb6082eac33fe7bff8e4tree | snapshot
parent4c84cced9304303ed1c73e35277891249e3cc2cdcommit | diff
arm64: dts: microchip: add missing cache properties

As all level 2 and level 3 caches are unified, add required
cache-unified and cache-level properties to fix warnings like:

  sparx5_pcb125.dtb: l2-cache0: 'cache-level' is a required property

Link: https://lore.kernel.org/r/20230421223155.115339-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arch/arm64/boot/dts/microchip/sparx5.dtsi diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git