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(parent: 9071550) | patch
dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions
authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Mon, 25 Apr 2022 06:41:56 +0000 (15:41 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 25 Apr 2022 08:34:19 +0000 (10:34 +0200)
commitf2afa78d5a0c0b0b2461a5c532d7a84214a1b633
tree7b26873a761e744be488889c0f1336189b2dc789tree | snapshot
parent90715507cb899df6c726494c0225d30130ad0cc5commit | diff
dt-bindings: clock: Add r8a779g0 CPG Core Clock Definitions

Add all Clock Pulse Generator Core Clock Outputs for the Renesas
R-Car V4H (R8A779G0) SoC.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220425064201.459633-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
include/dt-bindings/clock/r8a779g0-cpg-mssr.h [new file with mode: 0644] blob
ep93xx device tree rework repo: git://git.maquefel.me/linux.git