dt-bindings: spi: cadence-quadspi: document "intel,socfpga-qspi"
authorDinh Nguyen <dinguyen@kernel.org>
Mon, 22 Nov 2021 15:54:00 +0000 (09:54 -0600)
committerDinh Nguyen <dinguyen@kernel.org>
Mon, 27 Dec 2021 10:20:05 +0000 (04:20 -0600)
commitf34e8875ae244462711e31fcc4a82db13a16d36f
tree847c5e68783fa96801ecb5ace0b2e28b6689e2fd
parentfc74e0a40e4f9fd0468e34045b0c45bba11dcbb2
dt-bindings: spi: cadence-quadspi: document "intel,socfpga-qspi"

The QSPI controller on Intel's SoCFPGA platform does not implement the
CQSPI_REG_WR_COMPLETION_CTRL register, thus a write to this register
results in a crash.

Introduce the dts compatible "intel,socfpga-qspi" to differentiate the
hardware.

Acked-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v3: revert to "intel,socfpga-qspi"
v2: change binding to "cdns,qspi-nor-0010" to be more generic for other
    platforms
Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml