arm64: dts: renesas: r9a07g044: Fix SCI{Rx,Tx} interrupt types
authorBiju Das <biju.das.jz@bp.renesas.com>
Tue, 2 Aug 2022 10:15:32 +0000 (11:15 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 22 Aug 2022 07:46:03 +0000 (09:46 +0200)
commitf3b7bc89c97b98aa6f157d5f296695af8940a5ac
treef998530d2eb13173a6f7c4f48d606318dfa2652e
parent56f0a373f0a8f9e4a783aa600c11f00ca33398e5
arm64: dts: renesas: r9a07g044: Fix SCI{Rx,Tx} interrupt types

As per the latest RZ/G2L Hardware User's Manual (Rev.1.10 Apr, 2022),
the interrupt type of SCI{Rx,Tx} is edge triggered.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Fixes: f9a2adcc9e908907 ("arm64: dts: renesas: r9a07g044: Add SCI[0-1] nodes")
Link: https://lore.kernel.org/r/20220802101534.1401342-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a07g044.dtsi