riscv: Fix SMP when shadow call stacks are enabled
authorSamuel Holland <samuel.holland@sifive.com>
Tue, 21 Nov 2023 21:19:29 +0000 (13:19 -0800)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 6 Dec 2023 15:15:19 +0000 (07:15 -0800)
commitf40cab8e18ed57d2c7b5213437d83d955f78097f
treeaf8e911c51379c8a589c532dc0463504971b5871
parent96ba4a47d147cf8c4b764ec3a66a088a5bb3033a
riscv: Fix SMP when shadow call stacks are enabled

This fixes two bugs in SCS initialization for secondary CPUs. First,
the SCS was not initialized at all in the spinwait boot path. Second,
the code for the SBI HSM path attempted to initialize the SCS before
enabling the MMU. However, that involves dereferencing the thread
pointer, which requires the MMU to be enabled.

Fix both issues by setting up the SCS in the common secondary entry
path, after enabling the MMU.

Fixes: d1584d791a29 ("riscv: Implement Shadow Call Stack")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Sami Tolvanen <samitolvanen@google.com>
Link: https://lore.kernel.org/r/20231121211958.3158576-1-samuel.holland@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/kernel/head.S