RISC-V: Add SBI debug console helper routines
authorAnup Patel <apatel@ventanamicro.com>
Fri, 24 Nov 2023 07:09:02 +0000 (12:39 +0530)
committerPalmer Dabbelt <palmer@rivosinc.com>
Wed, 10 Jan 2024 15:04:03 +0000 (07:04 -0800)
commitf43fabf444ca3c4c74bf5fa5211bb2d0548715c4
tree301f08cfea0c633900e103c641c7908b6ea67f3f
parentf503b167b66007fc6b4434cd07a044ce4a56b6a0
RISC-V: Add SBI debug console helper routines

Let us provide SBI debug console helper routines which can be
shared by serial/earlycon-riscv-sbi.c and hvc/hvc_riscv_sbi.c.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20231124070905.1043092-3-apatel@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/sbi.h
arch/riscv/kernel/sbi.c