target/riscv/tcg: add sha
authorDaniel Henrique Barboza <dbarboza@ventanamicro.com>
Wed, 18 Dec 2024 11:40:26 +0000 (08:40 -0300)
committerAlistair Francis <alistair.francis@wdc.com>
Sat, 18 Jan 2025 23:44:34 +0000 (09:44 +1000)
commitf4df21e07f126eab24adf505cb33db0c94968cab
tree721566499671faeb9408efbaac846e88c3f07f58
parent2fedb6b1835cc83a168a920dd39dbd3cd834c254
target/riscv/tcg: add sha

'sha' is the augmented hypervisor extension, defined in RVA22 as a set of
the following extensions:

- RVH
- Ssstateen
- Shcounterenw (always present)
- Shvstvala (always present)
- Shtvala (always present)
- Shvstvecd (always present)
- Shvsatpa (always present)
- Shgatpa (always present)

We can claim support for 'sha' by checking if we have RVH and ssstateen.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20241218114026.1652352-10-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
target/riscv/cpu.c
target/riscv/cpu_cfg.h
target/riscv/tcg/tcg-cpu.c