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clk: mediatek: Add MT8195 vppsys0 clock support
authorChun-Jie Chen <chun-jie.chen@mediatek.com>
Tue, 14 Sep 2021 02:16:29 +0000 (10:16 +0800)
committerStephen Boyd <sboyd@kernel.org>
Tue, 14 Sep 2021 22:05:39 +0000 (15:05 -0700)
commitf5bf0c1b486f908b3ff1736121cd65b0791796ec
tree127bfbcb6eb2726aa4dd352b9043c728b8402992tree | snapshot
parentb5d728d8f1387352b354fa53b83c324618b29ba8commit | diff
clk: mediatek: Add MT8195 vppsys0 clock support

Add MT8195 vppsys0 clock controller which provides clock gate
controller for Video Processor Pipe.

Signed-off-by: Chun-Jie Chen <chun-jie.chen@mediatek.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20210914021633.26377-21-chun-jie.chen@mediatek.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/mediatek/Makefile diff | blob | history
drivers/clk/mediatek/clk-mt8195-vpp0.c [new file with mode: 0644] blob
ep93xx device tree rework repo: git://git.maquefel.me/linux.git