ARM: dts: exynos: correct PMIC interrupt trigger level on SMDK5250
authorKrzysztof Kozlowski <krzk@kernel.org>
Thu, 10 Dec 2020 21:25:24 +0000 (22:25 +0100)
committerKrzysztof Kozlowski <krzk@kernel.org>
Sun, 7 Mar 2021 19:56:17 +0000 (20:56 +0100)
commitf6368c60561370e4a92fac22982a3bd656172170
tree56cf411fc6b6046a27be543019072849bd397758
parentfbe9c9bb2e929865500a0985735f81c0142accad
ARM: dts: exynos: correct PMIC interrupt trigger level on SMDK5250

The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 47580e8d94c2 ("ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-8-krzk@kernel.org
arch/arm/boot/dts/exynos5250-smdk5250.dts