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(parent: 6510223) | patch
ARM: debug: enable UART1 for socfpga Cyclone5
authorClément Péron <peron.clem@gmail.com>
Tue, 9 Oct 2018 11:28:37 +0000 (13:28 +0200)
committerDinh Nguyen <dinguyen@kernel.org>
Wed, 28 Nov 2018 15:18:36 +0000 (09:18 -0600)
commitf6628486c8489e91c513b62608f89ccdb745600d
tree52a0e74f47f2c8072ba9b01c8994122cddb34447tree | snapshot
parent651022382c7f8da46cb4872a545ee1da6d097d2acommit | diff
ARM: debug: enable UART1 for socfpga Cyclone5

Cyclone5 and Arria10 doesn't have the same memory map for UART1.

Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
arch/arm/Kconfig.debug diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git