util: Add RISC-V vector extension probe in cpuinfo
authorTANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Mon, 7 Oct 2024 02:56:49 +0000 (10:56 +0800)
committerRichard Henderson <richard.henderson@linaro.org>
Tue, 22 Oct 2024 18:57:25 +0000 (11:57 -0700)
commitf7230e09b1ccfb7055b79dfee981e18d444a118a
treedd04d094b541d1691d95ce965f03aa5486a1ce57
parentbe46e0bf142d75c1978801d5d2c2394e7dfa304d
util: Add RISC-V vector extension probe in cpuinfo

Add support for probing RISC-V vector extension availability in
the backend. This information will be used when deciding whether
to use vector instructions in code generation.

Cache lg2(vlenb) for the backend. The storing of lg2(vlenb) means
we can convert all of the division into subtraction.

While the compiler doesn't support RISCV_HWPROBE_EXT_ZVE64X,
we use RISCV_HWPROBE_IMA_V instead. RISCV_HWPROBE_IMA_V is more
strictly constrainted than RISCV_HWPROBE_EXT_ZVE64X. At least in
current QEMU implemenation, the V vector extension depends on the
zve64d extension.

Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Tested-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20241007025700.47259-2-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
host/include/riscv/host/cpuinfo.h
util/cpuinfo-riscv.c