spi: atmel-quadspi: Add support for configuring CS timing
authorTudor Ambarus <tudor.ambarus@microchip.com>
Thu, 17 Nov 2022 10:52:45 +0000 (12:52 +0200)
committerMark Brown <broonie@kernel.org>
Fri, 18 Nov 2022 11:57:11 +0000 (11:57 +0000)
commitf732646d0ccd22f42ed7de5e59c0abb7a848e034
treeee35f0fa0ad4c5fad6d02fa780f78f1e596b39ec
parent684a47847ae639689e7b823251975348a8e5434f
spi: atmel-quadspi: Add support for configuring CS timing

The at91 QSPI IP uses a default value of half of the period of the QSPI
clock period for the cs-setup time, which is not always enough, an example
being the sst26vf064b SPI NOR flash which requires a minimum cs-setup time
of 5 ns. It was observed that none of the at91 SoCs can fulfill the
minimum CS setup time for the aforementioned flash, as they operate at
high frequencies and half a period does not suffice for the required CS
setup time. Add support for configuring the CS timing in the controller.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20221117105249.115649-5-tudor.ambarus@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
drivers/spi/atmel-quadspi.c