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perf/x86/intel/uncore: Add Sapphire Rapids server M2PCIe support
authorKan Liang <kan.liang@linux.intel.com>
Wed, 30 Jun 2021 21:08:29 +0000 (14:08 -0700)
committerPeter Zijlstra <peterz@infradead.org>
Fri, 2 Jul 2021 13:58:38 +0000 (15:58 +0200)
commitf85ef898f8842b2a9a8f51a64eaf45ee2a8bb1f7
tree554bc6eb9a4d2d2b3c462b5e067fa71f110af067tree | snapshot
parente199eb5131591c020705deceee224b437d09ece4commit | diff
perf/x86/intel/uncore: Add Sapphire Rapids server M2PCIe support

M2PCIe* blocks manage the interface between the mesh and each IIO stack.

The layout of the control registers for a M2PCIe uncore unit is similar
to a IRP uncore unit.

Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lore.kernel.org/r/1625087320-194204-6-git-send-email-kan.liang@linux.intel.com
arch/x86/events/intel/uncore_snbep.c diff | blob | history
ep93xx device tree rework repo: git://git.maquefel.me/linux.git