RISC-V: ACPI: Cache and retrieve the RINTC structure
authorSunil V L <sunilvl@ventanamicro.com>
Mon, 15 May 2023 05:49:16 +0000 (11:19 +0530)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 1 Jun 2023 15:45:03 +0000 (08:45 -0700)
commitf995611994704b5c039731287b897993808e63e3
tree40a204a525d1c8b289b6a189d8e0cb563718a8f4
parent724f4c0df7665a1bb9cb105a20131dfca5c032dd
RISC-V: ACPI: Cache and retrieve the RINTC structure

RINTC structures in the MADT provide mapping between the hartid
and the CPU. This is required many times even at run time like
cpuinfo. So, instead of parsing the ACPI table every time, cache
the RINTC structures and provide a function to get the correct
RINTC structure for a given cpu.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20230515054928.2079268-10-sunilvl@ventanamicro.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/acpi.h
arch/riscv/kernel/acpi.c
arch/riscv/kernel/setup.c