hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache
authorJason Chien <jason.chien@sifive.com>
Fri, 8 Nov 2024 11:01:47 +0000 (19:01 +0800)
committerAlistair Francis <alistair.francis@wdc.com>
Sat, 18 Jan 2025 23:44:35 +0000 (09:44 +1000)
commitfa622855eaaca8b543e19cf7ba8ab0304a1e4b84
tree71c98fed5f7399c24caed72a96b133d7a480e95e
parent2d8e8259287ced7c689a7c7fad67ad2a417e477c
hw/riscv/riscv-iommu.c: Introduce a translation tag for the page table cache

This commit introduces a translation tag to avoid invalidating an entry
that should not be invalidated when IOMMU executes invalidation commands.
E.g. IOTINVAL.VMA with GV=0, AV=0, PSCV=1 invalidates both a mapping
of single stage translation and a mapping of nested translation with
the same PSCID, but only the former one should be invalidated.

Signed-off-by: Jason Chien <jason.chien@sifive.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20241108110147.11178-1-jason.chien@sifive.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
hw/riscv/riscv-iommu.c