drm/i915: Don't read query SSEU for non-existent slice 0 on old platforms
authorMatt Roper <matthew.d.roper@intel.com>
Fri, 12 Nov 2021 16:01:07 +0000 (08:01 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Mon, 15 Nov 2021 18:51:20 +0000 (10:51 -0800)
commitfac73543fff0ff23622c98879c66d069778c114a
tree5341cb6e466b02a5654b22b5e9effeea7a7445e7
parent5f1176b419f9468f05dabdc8352bfa9b15427377
drm/i915: Don't read query SSEU for non-existent slice 0 on old platforms

Pre-HSW platforms don't use the gt SSEU structures; this means that
calling intel_sseu_get_subslices() on slice 0 for these platforms will
trip a GEM_BUG_ON(slice >= sseu->max_slices) warning.

Let's move the DSS lookup for a DG2 workaround into a helper function
that will only get called after we've already decided that we're on a
DG2 platform.

Fixes: 645cc0b9d972 ("drm/i915/dg2: Add initial gt/ctx/engine workarounds")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211112160107.1593906-1-matthew.d.roper@intel.com
drivers/gpu/drm/i915/gt/intel_workarounds.c